1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com TP2104 general description this low threshold enhancement-mode (normally-off) transistor utilizes a vertical dmos structure and supertexs well-proven silicon-gate manufacturing process. this combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coef?cient inherent in mos devices. characteristic of all mos structures, this device is free from thermal runaway and thermally- induced secondary breakdown. supertexs vertical dmos fets are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. p-channel enhancement mode vertical dmos fets absolute maximum ratings pin con?guration product marking to-236ab (sot-23) (k1) p1lw w = code for week sealed = green packagin g drain sourc e ga te ordering information device package options bv dss /bv dgs (v) r ds(on) (max) () v gs(th) (max) (v) to-236ab (sot-23) to-92 TP2104 TP2104k1-g TP2104n3-g -40 6.0 -2.0 -g indicates package is rohs compliant (green) parameter value drain-to-source voltage bv dss drain-to-gate voltage bv dgs gate-to-source voltage 20v operating and storage temperature -55c to +150c soldering temperature* +300c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. * distance of 1.6mm from case for 10 seconds. ga te source drain to-92 (n3) to-236ab (sot-23) (k1) yy = year sealed ww = week sealed = green packaging s i t p 2 1 0 4 y y w w to-92 (n3) features high input impedance and high gain low power drive requirement ease of paralleling low c iss and fast switching speeds excellent thermal stability integral source-drain diode free from secondary breakdown applications logic level interfaces - ideal for ttl and cmos solid state relays analog switches power management telecom switches ? ? ? ? ? ? ? ? ? ? ? ? package may or may not include the following marks: si or package may or may not include the following marks: si or
2 TP2104 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com thermal characteristics package i d (continuous) ? (ma) i d (pulsed) (a) power dissipation @ t a = 25 o c (w) jc o c/w j a o c/w i dr ? (ma) i drm (a) to-236ab (sot-23) -160 -0.8 0.36 200 350 -160 -0.8 to-92 -250 -1.0 0.74 125 170 -250 -1.0 ? i d (continuous) is limited by max rated t j . switching waveforms and test circuit 90% 10% 90% 90% 10% 10% puls e genera to r v dd r l outpu t d.u.t . t (on) t d(on) t (off ) t d(off) t f t r inpu t input output 0v v dd r gen 0v -10v sym parameter min typ max units conditions electrical characteristics (t a = 25c unless otherwise speci?ed) bv dss drain-to-source breakdown voltage -40 - - v v gs = 0v, i d = -1.0ma v gs(th) gate threshold voltage -1.0 - -2.0 v v gs = v ds , i d = -1.0ma ?v gs(th) change in v gs(th) with temperature - 5.8 6.5 mv/ o c v gs = v ds , i d = -1.0ma i gss gate body leakage - -1.0 -100 na v gs = 20v, v ds = 0v i dss zero gate voltage drain current - - -10 a v gs = 0v, v ds = max rating - -1.0 ma v ds = 0.8 max rating, v gs = 0v, t a = 125c i d(on) on-state drain current -0.6 - - a v gs = -10v, v ds = -25v r ds(on) static drain-to-source on-state resistance - - 10 v gs = -4.5v, i d = -50ma - 6.0 v gs = -10v, i d = -500ma ?r ds(on) change in r ds(on) with temperature - 0.55 1.0 %/ o c v gs = -10v, i d = -500ma g fs forward transconductance 150 200 - mmho v ds = -25v, i d = -500ma c iss input capacitance - 35 60 pf v gs = 0v, v ds = -25v, f = 1.0 mhz c oss common source output capacitance - 22 30 c rss reverse transfer capacitance - 8.0 10 t d(on) turn-on delay time - 4.0 6.0 ns v dd = -25v, i d = -500ma, r gen = 25? t r rise time - 4.0 8.0 t d(off) turn-off delay time - 5.0 9.0 t f fall time - 5.0 8.0 v sd diode forward voltage drop - -1.2 -2.0 v v gs = 0v, i sd = -500ma t rr reverse recovery time - 400 - ns v gs = 0v, i sd = -500ma notes: all d.c. parameters 100% tested at 25 o c unless otherwise stated. (pulse test: 300s pulse, 2% duty cycle.) all a.c. parameters sample tested. 1. 2.
3 TP2104 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com typical performance curves output characteristics -2.0 -1.6 -1.2 -0.8 -0.4 0 saturation characteristics -2. 0 -1. 6 -1. 2 -0. 8 -0. 4 0 maximum rated safe operating area -0.1 - 10 0 -10 -1.0 -0.01 -0.1 -1.0 -0.00 1 thermal response characteristic s ) d e z i l a m r o n ( e c n a t s i s e r l a m r e h t 1. 0 0. 8 0. 6 0. 4 0. 2 0 0.001 1 0 0.01 0. 1 1.0 transconductance vs. drain current power dissipation vs. temperature 0 1 50 10 0 50 1. 0 0. 8 0. 6 0. 4 0. 2 0 12 5 75 25 to-92 sot-23 sot-23 (dc) 0 - 10 -2 0 - 30 -50 -40 0 - 2 - 4 - 6 -10 -8 sot-23 (pulsed) t a = 25c 0.5 0.4 0.3 0.2 0.1 0 0 -0.2 -0.4 -0.6 -1.0 -0.8 -6 v -4 v -3 v -8 v -6v -3v -4v -8v t a = -55c 25c 125c sot-23 t a = 25 c p d = 0.36w v ds (volts) i d ) s e r e p m a ( v gs = -10v v gs = -10v v ds (volts) i d ) s e r e p m a ( g s f ) s n e m e i s ( i d (amperes) t a (c) p d ) s t t a w ( v ds = -25v v ds (volts) i d ) s e r e p m a ( t p (seconds) to-9 2 p d = 1w t c = 25 c
4 TP2104 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com typical performance curves (cont.) gate drive dynamic characteristic s q (nanocoulombs ) g v s g ) s t l o v ( t j ) h t ( s g v ) d e z i l a m r o n ( ) n o ( s d r ) d e z i l a m r o n ( v ds(on) gs(th) an d r variation with temperatur e c) ( on-resistance vs. drain current (amperes) d ) s m h o ( ) n o ( s d r variation with te mperature dss s s d ) d e z i l a m r o n ( v b c) ( t j transfer characteristics v gs (volts ) i ) s e r e p m a ( d capacitance vs. drain-to-source voltage 100 ) s d a r a f o c i p ( c v ds (volts ) i bv 0 - 10 -2 0 - 30 -40 50 75 25 0 0 - 2 - 4 - 6 - 8 -10 -2.0 -1.6 -1.2 -0.8 -0.4 0 -5 0 0 50 100 150 1.1 1.0 20 16 12 8 4 0 1.2 1.1 1.0 0.9 0.8 0.7 -1 0 -8 -6 -4 -2 0 0.5 1. 0 1. 5 2. 0 2.5 -5 0 0 50 10 0 1 50 35 pf v ds = -40v v ds = -10v v gs = -4.5 v v gs = -10v t = -55 c a v ds = -25v 125 c 0 -0.4 -0.8 -1.2 -2.0 -1.6 f = 1mhz c iss c oss c rss 0.9 125 pf 1.6 1.4 1.2 1.0 0.8 v @ -1ma 25c 0 r ds(on) @ -10v, -0.5a gs(th )
5 TP2104 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com 3-lead to-236ab (sot-23) package outline (k1) 2.90x1.30mm body, 1.12mm height (max), 1.90mm pitch symbol a a1 a2 b d e e1 e e1 l l1 dimension (mm) min 0.89 0.01 0.88 0.30 2.80 2.10 1.20 0.95 bsc 1.90 bsc 0.20 ? 0.54 ref 0 o nom - - 0.95 - 2.90 - 1.30 0.50 - max 1.12 0.10 1.02 0.50 3.04 2.64 1.40 0.60 8 o jedec registration to-236, variation ab, issue h, jan. 1999. ? this dimension is a non-jedec dimension. drawings not to scale. supertex doc.#: dspd-3to236abk1, version b072208. vi ew b vi ew a - a side v iew to p v iew vi ew b
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate product liability indemnification insurance agreement. supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. website: http//www .supertex.com . ?2009 all rights reserved. unauthorized use or reproduction is prohibited . 1235 bordeaux drive, sunnyvale, ca 94089 te l: 408-222-8888 www .supertex.com 6 TP2104 doc.# dsfp-TP2104 a022309 3-lead to-92 package outline (n3) symbol a b c d e e1 e e1 l dimensions (inches) min .170 .014 ? .014 ? .175 .125 .080 .095 .045 .500 nom - - - - - - - - - max .210 .022 ? .022 ? .205 .165 .105 .105 .055 .610* jedec registration to-92. * this dimension is not speci?ed in the original jedec drawing. the value listed is for reference only. ? this dimension is a non-jedec dimension. drawings not to scale. supertex doc.#: dspd-3to92n3, version d080408. seating plane 1 2 3 front v iew side v iew bottom v iew e1 e d e1 l e c 1 2 3 b a
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